Generally, an IC device may include high and low voltage devices (e.g. transistors) that can provide different functionalities and have different applications. For example, a logic core device may operate at a lower voltage than an analog device operating at a higher voltage. Advanced IC design and fabrication processes may be based on silicon-on-insulator (SOI) technology where a channel area of a device may be in the SOI layer. However, SOI channel areas of devices that operate at different voltages may be affected or perform differently. Some solutions may utilize different SOI channel thicknesses for the different devices such that the channel thickness of a device operating at a higher drain voltage may be greater than a channel thickness of a device operating at a lower voltage. However, forming the different channel thicknesses requires the use of an additional mask. Additionally, a uniform thinner SOI layer can cause challenges in forming raised source/drain regions adjacent each device.
A need therefore exists for a methodology for selectively thinning a channel area under a gate of a device and the resulting device.